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Update for 03-11-21 18:45

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Tyler Perkins 2021-11-03 18:45:01 -04:00
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@ -55,6 +55,14 @@ a pin to one (1) will enable it for output. The three DDR* registers are DDRB,
which allow for input to taken. These registers are read only. The three PIN* which allow for input to taken. These registers are read only. The three PIN*
registers are PINB (0x23), PINC (0x26), and PIND (0x29). registers are PINB (0x23), PINC (0x26), and PIND (0x29).
To help with reading, the above info is in this table.
| Port | DDR | Port | Pin |
---------------------------
| B | 0x24 | 0x25 | 0x23 |
| C | 0x27 | 0x28 | 0x26 |
| D | 0x2A | 0x2B | 0x29 |
=== Interrupts === === Interrupts ===
Interrupts are the same as OS typical interrupts, controlled by the Interrupt Interrupts are the same as OS typical interrupts, controlled by the Interrupt