diff --git a/tech/ATMega328P.wiki b/tech/ATMega328P.wiki
index 466aeb8..1e0d958 100644
--- a/tech/ATMega328P.wiki
+++ b/tech/ATMega328P.wiki
@@ -268,4 +268,5 @@ values are not used
 To control the ADC, the ADC control and Status Register A (ADCSRA 0x7A) and ADC
 Control and Status Register B (ADCSRB 0x7B) are used. Bit 7 of ADCSRA (ADC
 Enable or ADEN) enables the ADC when high (1), and disables when low. 
-Setting this bit low during a conversion will stop the conversion. 
+Setting this bit low during a conversion will stop the conversion. Bit 6 of
+ADCSRA (ADC Start Conversion or ADSC)