112 lines
3.0 KiB
Plaintext
112 lines
3.0 KiB
Plaintext
= Arduino Nano =
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A very small arduino product, better for hobby embedding
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see [[arduino_techniques|Programming Techniques]]
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== Features ==
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* ATMEL AVR ATmega328P microcontroller
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* 8 bit @16Mhz
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* 2Kbytes SRAM
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* 32Kbytes flash
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* 1Kbytes EEPROM
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* Three on board LED's * 20 IO pins
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* 6 PWM and 6 ADC
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== Notes ==
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* WHEN UPLOADING BE SURE TO SET BOARD TO ATMEGA328OLD
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- this is the atmega328old for BOARD_SUB in the makefile
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=== Memory ===
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* AVR instructions are 16 or 32bits wide, therefore the flash is 16K x 16
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* EEPROM has endurance of ~10000 write cycles
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* Program counter is 14 bits wide
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* First 32 memory locations (0x0000 - 0x001F) are registers
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* Next 64 registers are standard IO (0x0020 - 0x005F)
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* Next 160 are extended IO (0x0060 - 0x00FF)
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* Everything else is SRAM (0x0100 - 0x08FF)
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=== IO ===
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* GPIO pins
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* Have a Data Direction Register (DDR)
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- Sets if data should go in or out
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* Is kept up via a [[multiplexer]] to decide which bit
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=== Pins ===
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Pins are controller by the atmega's ports. Each port has different port
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registers. Each bit of the 8 bit register controls a single pin. Port D
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controls pins 0 through 7, C controls the analog pins, and B controls 8 through
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13
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* PortC
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- Port C data regiser
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- 0x28
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- R/W 8bits
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* DDRC
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- Port C data direction register
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- 0x27
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- R/W 8bits
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* PINC
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- Port C input pints address
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- 0x26
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- R 8bits
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* PortB
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- Port B data register
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- 0x25
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- R/W 8bits
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* DDRB
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- Port B data direction register
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- 0x24
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- R/W 8bits
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* PINB
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- Port B Input pins address
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- 0x23
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- R 8bit
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Same pattern:
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* PortD
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- 0x2B - 0x29
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=== Interrupts ===
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Interrupts are the same as OS typical interrupts, controlled by the Interrupt
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lookup table. On this device the ILT is instead a control register.
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The External Interrupt Control Regsiter (EICR 0x69) is a register that allows you to set
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the behaviour of the two built in interrupts. The Behaviour is set via setting
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two bits. Bits 3-2 are for Interrupt 1 on pin D3, and Bits 1-0 are for
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Interrupt 0 on pin D2. Below is a table of the values and their behaviour
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| Bits | Description |
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----------------------
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| 00 | Low level makes an interrupt |
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| 01 | Any logical change makes an interrupt |
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| 10 | Falling edge makes an interrupt |
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| 11 | Rising edge makes an interrupt |
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To enable the interrupt, you must write a one (1) to the appropriate bit in the
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External Interrupt Mask Register (EIMSK 0x3D). Bit 0 set INT0, and Bit 1 sets
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INT1.
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NOTE external activity on the pin, once the EIMSK bit is set, will cause an
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interrupt even if the pin is set as an output pin.
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Once an interrupt is triggered, the External Interrupt Flag Register (EIFR
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0x3C) will have a one (1) written to the corresponding bit for that interrupt.
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The flag is set automatically, and cleared once the interrupt has concluded.
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The flag can be cleared by writing to it manually. Bit0 controlls INT0 and Bit
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1 controlls INT1.
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=== Clock ===
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The ATMega328P has 3 timers, two 8bit timers and one 16bit timer. These timers
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can be used for PWM for motors and the like.
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[[embedded]]
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