tyler/vimwiki
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Update for 16-11-21 13:45

Browse Source
This commit is contained in:
Tyler Perkins 2021-11-16 13:45:01 -05:00
parent 98f8fd666a
commit d92c577eaa
1 changed files with 5 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
tech/ATMega328P.wiki
View File

@ -315,4 +315,8 @@ data register is the most signifigant bit, and Bit 0 is the least. When ADLAR
is high, Bit 15 is the most signifigant, while Bit 6 is the least. is high, Bit 15 is the most signifigant, while Bit 6 is the least.
When running pins in analog mode, the digital input buffer on the pin can also When running pins in analog mode, the digital input buffer on the pin can also
be disabled (this is ideal to save power). be disabled (this is ideal to save power). This is done by modifying the
Digital Input Disable Register 0 (DIDR0 0x7E). Bits 5-0 correspond to ADC5-0
pins (A5-A0 on the Nano). ADC7 and ADC6 do not have digital input pins, and
therefore do not need digital disable bits.