Update for 16-11-21 11:45

This commit is contained in:
Tyler Perkins 2021-11-16 11:45:01 -05:00
parent 684fb6a232
commit f3ee2b258d

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@ -268,4 +268,5 @@ values are not used
To control the ADC, the ADC control and Status Register A (ADCSRA 0x7A) and ADC
Control and Status Register B (ADCSRB 0x7B) are used. Bit 7 of ADCSRA (ADC
Enable or ADEN) enables the ADC when high (1), and disables when low.
Setting this bit low during a conversion will stop the conversion.
Setting this bit low during a conversion will stop the conversion. Bit 6 of
ADCSRA (ADC Start Conversion or ADSC)